The present invention relates to a method for manufacturing a silicon-on-insulator ("SOI") structure based on a layer of calcium fluoride (CaF.sub.2) as the insulator.
The development of SOI material structures are of considerable interest in integrated circuit technology because successful development of such structures will allow fabrication of three-dimensional integrated circuits. Additionally, SOI material structures will allow fabrication of memory and logic circuits that are immune to both soft errors due to alpha particles and single particle upset events caused by high-energy particles (1).
SOI structures are being pursued as a technique to isolate each device in a chip on its own silicon mesa, which would sit on top of an insulating layer. As a result, less chip area would be required than the present isolation techniques in standard silicon technology. "Latch up" would be eliminated and stray captive coupling would also be reduced. Currently, most research and development activity in SOI focuses on the use of a layer of amorphous SiO.sub.2 with the thickness of 1500-5000 .ANG. as the insulator because of the excellent properties of SiO.sub.2 and its excellent compatibility with silicon. The single crystal layer of silicon over the SiO.sub.2 is formed generally by two main techniques involving recrystalizing amorphous or polycrystaline silicon from seed locations in the underlying silicon substrate, or implanting a very high dose, approximately 10.sup.18 ions/cm, ion implantation of oxygen, to form an amorphous SiO.sub.2 layer below the surface of silicon substrate.
Although prior techniques have met with moderate success, difficulty exists in obtaining low defect density, high-quality single crystal silicon on amorphous SiO.sub.2 layers. An alternative approach to the formation of the SOI structure is utilizing a single-crystal, lattice-matched insulator, which allows the possibility for growth of a single crystal overlying silicon layer directly on the insulator.
Calcium fluoride (CaF.sub.2) is optimal for fabricating SOI because of its wide band gap and a cubic structure similar to that of silicon. CaF.sub.2 is lattice matched to silicon to within 0.6% at room temperature.
SOI insulators based on CaF.sub.2 have been demonstrated using molecular beam epitaxy (MBE) (2), but more work is needed to achieve high electrical quality SOI structures and interfaces, and topographically smooth layers of uniform thickness. Using MBE, CaF.sub.2 is grown using CaF.sub.2, evaporated from tungsten or graphite crucibles at very high temperatures (1200-1400.degree. C.) onto silicon substrates at temperatures from 550-700.degree. C. (3,4).
Chemical vapor deposition ("CVD") was used in some of the earlier efforts to grow silicon insulator (SI) on insulating substrates, including CaF.sub.2. However, the gases involved in the CVD process were subject to a growth temperature of about 1100.degree. C. Additionally, the gases reacted with the CaF.sub.2 substrate, resulting in poor epitaxy.
One key requirement for the success of the present approach has been to identify and develop appropriate volatile organometallic precursors and CVD reations which will produce CaF.sub.2. Unlike other well documented organometallic chemical vapor deposition (OMCVD) processes such as those employed for the fabrication of thin films of III/V compound semiconducts (5) there appear to be no previous reports of CVD growth of CaF.sub.2. This may be due to the lack of suitable volatile calcium compounds (6).